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Source-Synchronous Networks-On-Chip

Circuit and Architectural Interconnect Modeling

Source-Synchronous Networks-On-Chip Image

Book Details:

Publisher:Springer
Series: Springer
Author:Ayan Mandal
Edition:1
ISBN-10:1461494044
ISBN-13:9781461494041
Pages:160
Published:Nov 27 2013
Posted:Nov 19 2014
Language:English
Book format:PDF
Book size:2.59 MB

Book Description:

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized.Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

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