This book introduces a general hardware acceleration technique that can significantly speed up finite difference time domain (FDTD) simulations and their applications to engineering problems without requiring any additional hardware devices. It provides detailed code demonstration and analysis to help readers get the step-by-step guidelines using the vector arithmetic logic units (VALU) in the CPU and demonstrates the detailed implementation techniques of VALU to the parallel FDTD method and presents a large number of engineering applications. It also introduces the cloud computing concept and engineering applications and presents a 3D parallel FDTD code, accelerated by using the VALU.